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BUY XC17S50APD8C https://www.utsource.net/itm/p/206644.html
SERIAL PROM FOR 50000 SYSTEM GATE LOGIC
Description: XC17S50APD8C is a Xilinx CPLD (Complex Programmable Logic Device) with 50 Macrocells. It is housed in a 8-pin DIP package. Features: 50 Macrocells Maximum Clock Frequency of 200 MHz Maximum Operating Frequency of 150 MHz Maximum Operating Voltage of 3.3V Maximum Operating Temperature of 85°C Maximum I/O Pins of 8 Maximum I/O Voltage of 3.3V Maximum I/O Current of 8mA Maximum Power Dissipation of 1.2W Applications: XC17S50APD8C is used in applications that require a low-cost, low-power, and high-performance CPLD. It is suitable for applications such as digital signal processing, embedded control, and communications. (For reference only)