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BUY CD40174BCN https://www.utsource.net/itm/p/326441.html

Description: CMOS Quad Exclusive-OR Gate Feature: High Speed: tPD = 10 ns (Typical) at VDD = 10 V Low Power Consumption: ICC = 0.4 μA (Max) at TA = 25°C Wide Operating Voltage Range: VDD = 2 V to 10 V High Noise Immunity: VNIH = VNIL = 28 % VDD (Min) Outputs Source/Sink 24 mA ESD Protection: Human Body Model > 2000 V Symmetrical Output Impedance: |IOH| = |IOL| = 24 mA (Min) Balanced Propagation Delays: tPLH tPHL Latch-Up Performance Exceeds 250 mA Per JESD 78, Class II Application: Clock Generators Pulse Generators Shift Registers Data Selectors/Multiplexers Data Storage Elements Code Converters Combinational Logic Circuits (For reference only)