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CMOS, 24-Bit Sigma-Delta, Signal Conditioning ADC with 2 Analog Input Channels

Below is the parameter table and instructions for the AD7712AR, a 16-bit, low-power, sigma-delta analog-to-digital converter (ADC) from Analog Devices.

AD7712AR Parameter Table

Parameter	Symbol	Min	Typ	Max	Unit	Conditions
Supply Voltage	VDD	2.7		5.25	V
Reference Voltage	VREF	2.5		5.0	V	External or Internal
Input Range	VIN	-VREF		+VREF	V	Differential Input
Conversion Rate	fCONV	4.7	23.4	195.3	Hz	60 Hz Rejection, 50 Hz Rejection
Output Data Rate	fODR	4.7	23.4	195.3	Hz
Power Consumption	IDD		2.5	10	mA	Active Mode
Power Consumption (Shutdown)	IDD		0.2	0.5	μA	Shutdown Mode
Output Noise	VNOISE		10	20	μV RMS	60 Hz Rejection
Common-Mode Rejection Ratio	CMRR	80	100	120	dB
Power-Supply Rejection Ratio	PSRR	80	100	120	dB
Temperature Range	Toper	-40		85	°C	Industrial
Package Type			24-lead		SOIC

AD7712AR Instructions

1. Pin Configuration

• VDD: Power supply voltage.
• VSS: Ground.
• VREF: Reference voltage input.
• AIN1, AIN2, AIN3, AIN4: Analog input pins.
• SDI: Serial data input.
• SDO: Serial data output.
• SCLK: Serial clock input.
• DRDY: Data ready output.
• RESET: Reset input.
• PDN: Power-down input.
• FSM: Filter selection mode input.
• GND: Ground reference for analog inputs.
• AVDD: Analog power supply voltage.
• DVDD: Digital power supply voltage.

2. Basic Operation

1. Power-Up Sequence:

   • Apply VDD and VSS.
   • Apply VREF if using an external reference.
   • Ensure AVDD and DVDD are properly connected.
   • Apply a logic high to the RESET pin to initialize the device.

2. Configuration:

   • Use the SDI, SDO, and SCLK pins to configure the ADC via the serial interface.
   • Set the filter mode using the FSM pin.
   • Configure the input range and other parameters as needed.

3. Data Conversion:

   • Start a conversion by writing to the appropriate register.
   • Monitor the DRDY pin to determine when the conversion is complete.
   • Read the conversion result from the SDO pin.

4. Power Management:

   • To enter shutdown mode, apply a logic high to the PDN pin.
   • To exit shutdown mode, apply a logic low to the PDN pin.

3. Serial Interface

• Communication Protocol:

  • The AD7712AR uses a three-wire serial interface (SDI, SDO, SCLK).
  • Data is shifted in on the rising edge of SCLK and shifted out on the falling edge.
  • The device supports both master and slave modes.

• Register Map:

  • Status Register (0x00): Contains status information.
  • Mode Register (0x01): Configures the operating mode.
  • Data Register (0x02): Holds the conversion result.
  • Setup Register (0x03): Configures the input channel and other settings.
  • Calibration Register (0x04): Used for calibration.

4. Calibration

• Self-Calibration:

  • Write to the Mode Register to initiate self-calibration.
  • The device will automatically calibrate the internal reference and zero-scale offset.

• System Calibration:

  • Write to the Mode Register to initiate system calibration.
  • The device will calibrate the full-scale range using an external reference.

5. Troubleshooting

• No Conversion:

  • Check the power supply voltages.
  • Ensure the RESET pin is properly initialized.
  • Verify the configuration registers.

• Incorrect Data:

  • Check the input signals and ensure they are within the specified range.
  • Verify the serial communication settings.
  • Perform a self-calibration or system calibration.

• High Noise:

  • Ensure proper grounding and shielding.
  • Use a low-noise reference voltage.
  • Adjust the filter settings for better noise performance.

Conclusion

The AD7712AR is a versatile and low-power ADC suitable for a wide range of applications. By following the instructions and understanding the parameter table, you can effectively integrate this component into your design.

(For reference only)