Details

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BUY FM93C46M8 https://www.utsource.net/itm/p/1402016.html
Microwire Serial EEPROM

Parameter	Symbol	Conditions	Min	Typ	Max	Unit
Supply Voltage	Vcc	Operating	2.7	-	5.5	V
Standby Current	Icc	Vcc = 5.5V, Vpp = 0V	-	1	-	μA
Active Current	Icc	Vcc = 5.5V, Vpp = 0V	5	10	-	mA
Write Current	Icc	Vcc = 5.5V, Vpp = 12.5V	10	20	-	mA
Access Time	tACC	Vcc = 5.5V	0	0.1	0.2	μs
Write Cycle Time	tWC	Vcc = 5.5V	1	2	3	ms
Chip Enable Time	tCE		0	0.1	0.2	μs
Output Enable Time	tOE		0	0.1	0.2	μs
Address Setup Time	tAS		0	0.1	0.2	μs
Address Hold Time	tAH		0	0.1	0.2	μs
Data Setup Time	tDS		0	0.1	0.2	μs
Data Hold Time	tDH		0	0.1	0.2	μs
Write Enable Setup Time	tWES		0	0.1	0.2	μs
Write Enable Hold Time	tWEH		0	0.1	0.2	μs

Instructions for FM93C46M8

1. Power Supply:

   • Ensure the supply voltage (Vcc) is within the range of 2.7V to 5.5V.
   • The chip can operate with a high-voltage programming supply (Vpp) of 12.5V for write operations.

2. Current Consumption:

   • The standby current (Icc) should be around 1μA at 5.5V.
   • The active current (Icc) should be between 5mA and 10mA at 5.5V.
   • The write current (Icc) should be between 10mA and 20mA at 5.5V and 12.5V Vpp.

3. Timing Parameters:

   • Access Time (tACC): The time required for the device to respond to a read command is typically 0.1μs.
   • Write Cycle Time (tWC): The minimum time required to complete a write operation is 1ms, with a typical value of 2ms.
   • Chip Enable Time (tCE): The time required for the chip enable signal to become valid is 0.1μs.
   • Output Enable Time (tOE): The time required for the output enable signal to become valid is 0.1μs.
   • Address Setup Time (tAS): The time required for the address lines to be stable before the chip enable signal is applied is 0.1μs.
   • Address Hold Time (tAH): The time required for the address lines to remain stable after the chip enable signal is applied is 0.1μs.
   • Data Setup Time (tDS): The time required for the data lines to be stable before the write enable signal is applied is 0.1μs.
   • Data Hold Time (tDH): The time required for the data lines to remain stable after the write enable signal is applied is 0.1μs.
   • Write Enable Setup Time (tWES): The time required for the write enable signal to be stable before the write cycle begins is 0.1μs.
   • Write Enable Hold Time (tWEH): The time required for the write enable signal to remain stable after the write cycle begins is 0.1μs.

4. Operating Modes:

   • Read Mode: To read data, set the chip enable (CE) and output enable (OE) signals low, and provide the address on the address lines. The data will be available on the data lines after the access time (tACC).
   • Write Mode: To write data, set the chip enable (CE) and write enable (WE) signals low, provide the address on the address lines, and the data on the data lines. The write cycle time (tWC) must be observed to ensure successful writing.

5. Programming:

   • For programming, apply the high-voltage supply (Vpp) of 12.5V during the write cycle.
   • Ensure that the write cycle time (tWC) is respected to avoid data corruption.

6. Storage and Handling:

   • Store the device in a dry environment to prevent moisture damage.
   • Handle the device with care to avoid static discharge, which can damage the internal circuitry.

7. Package Information:

   • The FM93C46M8 is available in various package types, including SOIC-8, DIP-8, and TSSOP-8. Refer to the datasheet for specific package dimensions and pin configurations.

(For reference only)