Details

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BUY EPF8282ALC84-2 https://www.utsource.net/itm/p/1728033.html
Field Programmable Gate Array FPGA
Description: Altera MAX II CPLD, 84 Macrocells, 2.5V/3.3V, PLCC-84 Features: 84 Macrocells 2.5V/3.3V Power Supply Up to 32 Kbits of Embedded Memory Up to 8 Multipliers Up to 10 I/O Registers Up to 8 Inputs and 8 Outputs Up to 48 I/O Pins Up to 4 Clock Inputs Up to 4 Global Clock Networks Up to 4 Global Reset Inputs Up to 4 Global Set Inputs Up to 4 Global Set/Reset Outputs Up to 4 Global Clock Outputs Up to 4 Global Clock Enable Outputs Up to 4 Global Clock Disable Outputs Up to 4 Global Clock Enable Inputs Up to 4 Global Clock Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Inputs Up to 4 Global Clock Enable/Disable Outputs Up to 4 Global Clock Enable/Disable Input (For reference only)