Details

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BUY IR2153 IR2153PBF https://www.utsource.net/itm/p/12605035.html

Parameter	Symbol	Conditions	Min	Typical	Max	Unit
Supply Voltage	VCC	Continuous	10	-	20	V
High-Side Driver Supply Voltage	VBOOT	Continuous	10	-	20	V
Low-Side Driver Supply Voltage	VSS	Continuous	0	-	5.5	V
High-Side Driver Output Current	IOH	VCC = 15V, VOH = 13.5V	-	1.5	-	A
Low-Side Driver Output Current	IOL	VCC = 15V, VOL = 0.5V	-	-1.5	-	A
High-Side Driver Input Threshold	VTHH	-	2.0	2.5	3.0	V
Low-Side Driver Input Threshold	VTHL	-	1.0	1.5	2.0	V
Propagation Delay Time	tpd	VCC = 15V, VIN = 5V	75	-	150	ns
Dead Time	td	VCC = 15V, VIN = 5V	60	-	120	ns
Operating Temperature Range	TA	-	-40	-	125	掳C
Storage Temperature Range	TSTG	-	-65	-	150	掳C

Instructions for Using the IR2153 IR2153PBF:

1. Power Supply:

   • Ensure that the supply voltage (V_CC) is within the range of 10V to 20V.
   • The high-side driver supply voltage (V_BOOT) should also be within the same range.
   • The low-side driver supply voltage (V_SS) should be between 0V and 5.5V.

2. Input Signals:

   • The high-side driver input threshold (V_THH) is typically around 2.5V, with a range of 2.0V to 3.0V.
   • The low-side driver input threshold (V_THL) is typically around 1.5V, with a range of 1.0V to 2.0V.
   • Ensure that the input signals are within these thresholds to avoid improper operation.

3. Output Current:

   • The high-side driver can source up to 1.5A when V_CC is 15V and V_OH is 13.5V.
   • The low-side driver can sink up to 1.5A when V_CC is 15V and V_OL is 0.5V.

4. Timing Parameters:

   • The propagation delay time (t_pd) is typically around 75ns but can vary between 75ns and 150ns.
   • The dead time (t_d) is typically around 60ns but can vary between 60ns and 120ns. This helps prevent shoot-through current in half-bridge configurations.

5. Temperature Considerations:

   • The operating temperature range (T_A) is from -40掳C to 125掳C.
   • The storage temperature range (T_STG) is from -65掳C to 150掳C.

6. Layout and PCB Design:

   • Ensure proper layout and PCB design to minimize noise and parasitic inductance, especially for the bootstrap capacitor and high-frequency signals.
   • Use short and wide traces for power and ground connections to reduce inductance and improve performance.

7. Bootstrap Capacitor:

   • Use a suitable bootstrap capacitor (typically 0.1渭F to 1渭F) to maintain the high-side gate drive voltage.
   • Place the bootstrap capacitor close to the IC to minimize parasitic inductance.

8. Protection:

   • Implement appropriate protection circuits such as overvoltage, undervoltage, and overcurrent protection to ensure reliable operation.

9. Testing:

   • Before finalizing the design, thoroughly test the circuit under various conditions to ensure it meets the required specifications and operates reliably.

(For reference only)