IR2156S

IR2156S


Specifications
Details

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Parameter Symbol Conditions Min Typ Max Unit
Supply Voltage VDD 10 20 V
Logic Input High Level VIH 2.0 3.5 5.5 V
Logic Input Low Level VIL -0.3 0.8 V
Under Voltage Lockout UVLO VDD 8.5 16.5 V
Bootstrap Capacitor Charge VB 7.5 20 V
Maximum Output Current IOH/IOL @ VDD = 15V 2.0/2.0 A
Propagation Delay tpdHL @ VDD = 15V, RL = 1k惟 40 90 ns
tpdLH @ VDD = 15V, RL = 1k惟 40 90 ns
Minimum Pulse Width tpwmin @ VDD = 15V 80 ns

Instructions for IR2156S:

  1. Supply Voltage (VDD):

    • Ensure the supply voltage is within the range of 10V to 20V. The device will not operate correctly outside this range.
  2. Logic Inputs:

    • For logic high input, apply a voltage between 2.0V and 5.5V.
    • For logic low input, apply a voltage less than 0.8V.
  3. Under Voltage Lockout (UVLO):

    • The device will be disabled if the supply voltage drops below 8.5V and will re-enable when it rises above 16.5V.
  4. Bootstrap Capacitor:

    • Use a bootstrap capacitor with a charge voltage between 7.5V and 20V to ensure proper operation of the high-side driver.
  5. Output Current:

    • Do not exceed the maximum output current of 2.0A for both sourcing and sinking.
  6. Propagation Delay:

    • Account for propagation delays up to 90ns in timing calculations.
  7. Minimum Pulse Width:

    • Ensure that any pulse width is at least 80ns to guarantee reliable operation.
  8. Installation and Handling:

    • Follow standard precautions for handling static-sensitive devices.
    • Ensure proper heat dissipation if operating near the upper limits of the specified parameters.

For detailed application circuits and further information, refer to the datasheet provided by the manufacturer.

(For reference only)

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