Details

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BUY IR2113STR https://www.utsource.net/itm/p/12609732.html

Parameter	Symbol	Min	Typ	Max	Unit	Notes
Supply Voltage	VCC	10	-	60	V	-
Bootstrap Supply Voltage	VB	10	-	60	V	-
Logic Input High Level	VIH	2.0	-	VCC	V	-
Logic Input Low Level	VIL	-	-	0.8	V	-
Gate Drive High-Side	VGH	10	-	60	V	-
Gate Drive Low-Side	VGL	10	-	60	V	-
Output Current (High-Side)	IOH	-	1.5	-	A	-
Output Current (Low-Side)	IOL	-	1.5	-	A	-
Propagation Delay	td	-	70	-	ns	-
Maximum Operating Frequency	fMAX	-	500	-	kHz	-
Power Dissipation	PD	-	-	700	mW	-
Operating Temperature Range	TA	-40	-	125	掳C	-
Storage Temperature Range	TSTG	-65	-	150	掳C	-

Instructions for Using the IR2113STR:

1. Supply Voltage:

   • Connect the V_CC pin to a supply voltage between 10V and 60V.
   • Ensure the bootstrap supply voltage (V_B) is also within this range.

2. Logic Inputs:

   • Apply logic high levels (V_IH) greater than 2.0V and less than or equal to V_CC.
   • Apply logic low levels (V_IL) less than or equal to 0.8V.

3. Gate Drive:

   • The high-side gate drive (V_GH) and low-side gate drive (V_GL) should be set between 10V and 60V.
   • Ensure the output current (I_OH and I_OL) does not exceed 1.5A.

4. Timing:

   • The propagation delay (t_d) is typically 70ns. Account for this delay in your timing calculations.

5. Frequency:

   • The maximum operating frequency (f_MAX) is 500kHz. Design your circuit to operate within this limit.

6. Power Dissipation:

   • The power dissipation (P_D) should not exceed 700mW. Use appropriate heat sinking if necessary.

7. Temperature:

   • The operating temperature range (T_A) is from -40掳C to 125掳C.
   • The storage temperature range (T_STG) is from -65掳C to 150掳C.

8. Bootstrap Capacitor:

   • Use a suitable bootstrap capacitor to maintain the high-side gate drive voltage. The capacitor should have a low ESR and be rated for the maximum operating frequency.

9. Protection:

   • Implement proper protection circuits to prevent overvoltage, undervoltage, and short-circuit conditions.

10. Layout:

    • Ensure a clean and well-designed PCB layout to minimize noise and parasitic effects. Keep the high-frequency signal traces as short as possible.

(For reference only)